This course is about the design of digital systems using a hardware description language, VHDL. The student will learn the basics of number representation and conversion, Boolean algebra, combinational circuit design and sequential circuit design with VHDL, and synchronous /asynchronous finite state machines. They will be given instruction on the measurement of performance, and testing, of digital systems. Lab exercises make use of the Xilinx ISE Webpack, which is a powerful state-of-the-art CAD tool for designing and implementing digital systems. The Circuit Lab (Sci III 313) is equipped with the Xilinx ISE Webpack software tools. The system consists of an integrated set of tools that allows one to capture designs with schematic entry or a Hardware Description Language (HDL), and simulate, implement and test these designs.